JPH0449292B2 - - Google Patents

Info

Publication number
JPH0449292B2
JPH0449292B2 JP57224734A JP22473482A JPH0449292B2 JP H0449292 B2 JPH0449292 B2 JP H0449292B2 JP 57224734 A JP57224734 A JP 57224734A JP 22473482 A JP22473482 A JP 22473482A JP H0449292 B2 JPH0449292 B2 JP H0449292B2
Authority
JP
Japan
Prior art keywords
frequency
signal
frequency divider
division ratio
divider
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57224734A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59114927A (ja
Inventor
Eisuke Ooi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP57224734A priority Critical patent/JPS59114927A/ja
Publication of JPS59114927A publication Critical patent/JPS59114927A/ja
Publication of JPH0449292B2 publication Critical patent/JPH0449292B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Circuits Of Receivers In General (AREA)
JP57224734A 1982-12-21 1982-12-21 可変周波数発振回路 Granted JPS59114927A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57224734A JPS59114927A (ja) 1982-12-21 1982-12-21 可変周波数発振回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57224734A JPS59114927A (ja) 1982-12-21 1982-12-21 可変周波数発振回路

Publications (2)

Publication Number Publication Date
JPS59114927A JPS59114927A (ja) 1984-07-03
JPH0449292B2 true JPH0449292B2 (en]) 1992-08-11

Family

ID=16818400

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57224734A Granted JPS59114927A (ja) 1982-12-21 1982-12-21 可変周波数発振回路

Country Status (1)

Country Link
JP (1) JPS59114927A (en])

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02213225A (ja) * 1989-02-13 1990-08-24 Nec Corp 可変周波数合成回路
JPH0349320A (ja) * 1989-07-17 1991-03-04 Nec Corp 周波数シンセサイザ

Also Published As

Publication number Publication date
JPS59114927A (ja) 1984-07-03

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